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		<summary type="html">&lt;p&gt;ZBC wiki page from What_is_Zero_Board_Computer.wiki&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;= What is Zero Board Computer? =&lt;br /&gt;
&lt;br /&gt;
The &amp;#039;&amp;#039;&amp;#039;Zero Board Computer&amp;#039;&amp;#039;&amp;#039; (&amp;#039;&amp;#039;&amp;#039;ZBC&amp;#039;&amp;#039;&amp;#039;) is a hardware and system specification designed to provide a minimal, standardized testing environment for CPU architectures. ZBC is not tied to any specific implementation—it can be realized in physical hardware (FPGA, ASIC) or virtual environments (emulators like MAME).&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
&lt;br /&gt;
ZBC defines a complete yet minimal computer system consisting of:&lt;br /&gt;
* A CPU of any architecture (8-bit through 128-bit and beyond)&lt;br /&gt;
* RAM sized appropriately for the CPU&amp;#039;s address space&lt;br /&gt;
* An MC6847 video display controller providing 32×16 character text output&lt;br /&gt;
* A memory-mapped semihosting peripheral for host I/O services&lt;br /&gt;
&lt;br /&gt;
The specification is &amp;#039;&amp;#039;&amp;#039;platform-agnostic&amp;#039;&amp;#039;&amp;#039; and &amp;#039;&amp;#039;&amp;#039;implementation-independent&amp;#039;&amp;#039;&amp;#039;. Whether built in hardware or software, any ZBC-compliant system presents the same interface to programs and behaves consistently across all CPU architectures.&lt;br /&gt;
&lt;br /&gt;
== The Problem ==&lt;br /&gt;
&lt;br /&gt;
Bringing up compilers, debuggers, and runtime libraries on new CPU architectures traditionally requires:&lt;br /&gt;
* Complex operating system infrastructure&lt;br /&gt;
* Multiple device drivers for I/O, storage, and timing&lt;br /&gt;
* Architecture-specific test harnesses&lt;br /&gt;
* Physical hardware or complex emulation setups&lt;br /&gt;
* Inconsistent testing environments across different platforms&lt;br /&gt;
&lt;br /&gt;
This complexity creates significant barriers to:&lt;br /&gt;
* Testing code generation across multiple CPU architectures&lt;br /&gt;
* Validating compiler optimizations and runtime behavior&lt;br /&gt;
* Developing architecture-agnostic debugging tools&lt;br /&gt;
* Educational use of diverse CPU architectures&lt;br /&gt;
* Automated testing of CPU emulators&lt;br /&gt;
&lt;br /&gt;
== The Solution ==&lt;br /&gt;
&lt;br /&gt;
ZBC solves these problems by providing a &amp;#039;&amp;#039;&amp;#039;minimal, standardized specification&amp;#039;&amp;#039;&amp;#039; that:&lt;br /&gt;
&lt;br /&gt;
=== Requires Only Two Device Drivers ===&lt;br /&gt;
Programs running on ZBC need drivers for just two devices:&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;MC6847 text display&amp;#039;&amp;#039;&amp;#039; - Simple memory-mapped character output&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Semihosting peripheral&amp;#039;&amp;#039;&amp;#039; - Memory-mapped I/O for host services&lt;br /&gt;
&lt;br /&gt;
=== Provides Immediate Host Access ===&lt;br /&gt;
Through the semihosting interface, programs immediately gain:&lt;br /&gt;
* File I/O (open, read, write, close, seek)&lt;br /&gt;
* Console I/O (character and string output)&lt;br /&gt;
* Timing services (clock, elapsed time)&lt;br /&gt;
* System services (execute host commands, get command line)&lt;br /&gt;
&lt;br /&gt;
This means &amp;#039;&amp;#039;&amp;#039;printf() works immediately&amp;#039;&amp;#039;&amp;#039; without implementing UART drivers, filesystem code, or an operating system.&lt;br /&gt;
&lt;br /&gt;
=== Works on Any CPU Architecture ===&lt;br /&gt;
The ZBC specification uses dynamic memory layout calculations that automatically adapt to any address space width. The same specification works equally well on:&lt;br /&gt;
* 8-bit CPUs with tiny address spaces&lt;br /&gt;
* 16-bit CPUs (6502, Z80, 8086)&lt;br /&gt;
* 32-bit CPUs (68000, ARM, i386)&lt;br /&gt;
* 64-bit CPUs (x86-64, AArch64, RISC-V)&lt;br /&gt;
* Future 128-bit and beyond architectures&lt;br /&gt;
&lt;br /&gt;
=== Guarantees Consistent Behavior ===&lt;br /&gt;
Every ZBC implementation, regardless of CPU or platform:&lt;br /&gt;
* Presents the same memory layout (scaled to address width)&lt;br /&gt;
* Provides the same peripheral interfaces&lt;br /&gt;
* Supports the same semihosting syscalls&lt;br /&gt;
* Produces deterministic, repeatable results&lt;br /&gt;
&lt;br /&gt;
== System Components ==&lt;br /&gt;
&lt;br /&gt;
=== CPU ===&lt;br /&gt;
Any CPU architecture can be used. The CPU connects to the system bus and accesses memory and peripherals using standard load/store operations. No special CPU features are required beyond basic memory access.&lt;br /&gt;
&lt;br /&gt;
=== RAM ===&lt;br /&gt;
System RAM is sized automatically based on the CPU&amp;#039;s address space width. The dynamic layout algorithm ensures maximum usable RAM while reserving space at high memory for peripherals. For example:&lt;br /&gt;
* 16-bit CPUs: ~63KB available RAM&lt;br /&gt;
* 32-bit CPUs: ~4GB available RAM&lt;br /&gt;
* 64-bit CPUs: Effectively unlimited RAM&lt;br /&gt;
&lt;br /&gt;
=== MC6847 Video Display Generator ===&lt;br /&gt;
The MC6847 VDG provides a simple text display:&lt;br /&gt;
* 32 columns × 16 rows of characters&lt;br /&gt;
* 512 bytes of memory-mapped video RAM&lt;br /&gt;
* Standard ASCII character set&lt;br /&gt;
* Automatic refresh at ~62Hz (PAL timing)&lt;br /&gt;
* Optional VSync interrupt for timing&lt;br /&gt;
&lt;br /&gt;
The MC6847 is a real historical chip used in 1980s home computers like the TRS-80 Color Computer and Dragon 32/64. Its simplicity makes it ideal for bringing up new systems.&lt;br /&gt;
&lt;br /&gt;
=== Semihosting Peripheral ===&lt;br /&gt;
A memory-mapped device providing host I/O services:&lt;br /&gt;
* 32 bytes of device registers&lt;br /&gt;
* RIFF-based protocol for architecture-agnostic communication&lt;br /&gt;
* ARM semihosting-compatible syscall interface&lt;br /&gt;
* Compatible with standard toolchains (gcc, clang, newlib, picolibc)&lt;br /&gt;
* Synchronous (polling) or asynchronous (interrupt-driven) operation&lt;br /&gt;
&lt;br /&gt;
See [[Semihosting Overview]] for complete details.&lt;br /&gt;
&lt;br /&gt;
== Use Cases ==&lt;br /&gt;
&lt;br /&gt;
=== Compiler Bring-Up and Testing ===&lt;br /&gt;
* Test code generation for new target architectures&lt;br /&gt;
* Validate optimizer behavior across instruction sets&lt;br /&gt;
* Debug runtime library implementations&lt;br /&gt;
* Verify ABI compliance&lt;br /&gt;
* Compare code quality across compilers&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;No OS required&amp;#039;&amp;#039;&amp;#039; - programs run directly on hardware&lt;br /&gt;
&lt;br /&gt;
=== Debugger Development ===&lt;br /&gt;
* Test debugger features on multiple architectures&lt;br /&gt;
* Controlled, predictable environment for debugging debuggers&lt;br /&gt;
* Consistent behavior simplifies test automation&lt;br /&gt;
* Standard I/O through semihosting eliminates platform differences&lt;br /&gt;
&lt;br /&gt;
=== Library Porting ===&lt;br /&gt;
* Port libc implementations to new architectures&lt;br /&gt;
* Test runtime libraries (memory allocation, I/O, timing)&lt;br /&gt;
* Validate POSIX compliance&lt;br /&gt;
* File I/O and console I/O available immediately through semihosting&lt;br /&gt;
&lt;br /&gt;
=== CPU Emulator Validation ===&lt;br /&gt;
* Test CPU emulation accuracy (MAME&amp;#039;s primary use case)&lt;br /&gt;
* Standardized test harness for hundreds of CPU types&lt;br /&gt;
* Automated testing and validation&lt;br /&gt;
* Quick verification that emulation is working&lt;br /&gt;
&lt;br /&gt;
=== Educational Platforms ===&lt;br /&gt;
* Learn assembly language and systems programming&lt;br /&gt;
* Experiment with diverse CPU architectures&lt;br /&gt;
* Simple enough for students and beginners&lt;br /&gt;
* Immediate visual feedback via text display&lt;br /&gt;
* Host I/O services without OS complexity&lt;br /&gt;
&lt;br /&gt;
== Design Philosophy ==&lt;br /&gt;
&lt;br /&gt;
The ZBC specification embodies four core principles:&lt;br /&gt;
&lt;br /&gt;
=== Simplicity ===&lt;br /&gt;
Minimal hardware components reduce complexity and implementation effort. Only essential peripherals are included. No unnecessary features or options that complicate the specification.&lt;br /&gt;
&lt;br /&gt;
=== Universality ===&lt;br /&gt;
A single specification works across all CPU architectures, from 8-bit to 128-bit and beyond. The dynamic memory layout algorithm automatically adapts to any address space width. Architecture-specific details are isolated and well-defined.&lt;br /&gt;
&lt;br /&gt;
=== Determinism ===&lt;br /&gt;
ZBC systems provide predictable, repeatable behavior. Memory layout is calculated algorithmically. Peripheral addresses are fixed relative to address space. Program execution is deterministic for given inputs.&lt;br /&gt;
&lt;br /&gt;
=== Standardization ===&lt;br /&gt;
All ZBC implementations present the same interface. Programs written for ZBC work on any compliant implementation. Toolchains need only target the ZBC specification, not individual implementations.&lt;br /&gt;
&lt;br /&gt;
== Comparison with Alternatives ==&lt;br /&gt;
&lt;br /&gt;
=== vs. Full Operating Systems ===&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Linux/Unix&amp;#039;&amp;#039;&amp;#039;: Requires complex kernel, device drivers, filesystem, userspace&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Bare Metal Boards&amp;#039;&amp;#039;&amp;#039;: Inconsistent hardware, limited availability, expensive&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;ZBC&amp;#039;&amp;#039;&amp;#039;: Minimal, universal, free, deterministic&lt;br /&gt;
&lt;br /&gt;
=== vs. QEMU System Mode ===&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;QEMU&amp;#039;&amp;#039;&amp;#039;: Architecture-specific machine models, heavy resource usage&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;ZBC&amp;#039;&amp;#039;&amp;#039;: Single specification for all CPUs, minimal overhead&lt;br /&gt;
&lt;br /&gt;
=== vs. Traditional Semihosting ===&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;ARM Semihosting&amp;#039;&amp;#039;&amp;#039;: Requires debugger, uses trap instructions, architecture-specific&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;ZBC Semihosting&amp;#039;&amp;#039;&amp;#039;: No debugger needed, memory-mapped I/O, works on any CPU&lt;br /&gt;
&lt;br /&gt;
== Implementation Status ==&lt;br /&gt;
&lt;br /&gt;
=== MAME Implementation ===&lt;br /&gt;
MAME (Multiple Arcade Machine Emulator) provides a reference implementation of the ZBC specification supporting hundreds of CPU architectures. The MAME implementation uses C++ templates to generate ZBC systems automatically for all supported CPUs.&lt;br /&gt;
&lt;br /&gt;
See [[MAME ZBC Implementation]] for implementation-specific details.&lt;br /&gt;
&lt;br /&gt;
=== Hardware Implementation ===&lt;br /&gt;
The ZBC specification can be implemented in physical hardware using FPGAs or custom ASICs. The specification is designed to be realizable with discrete components or integrated designs.&lt;br /&gt;
&lt;br /&gt;
== Next Steps ==&lt;br /&gt;
&lt;br /&gt;
* [[Getting Started]] - Run your first ZBC system&lt;br /&gt;
* [[System Overview]] - Understand the system architecture&lt;br /&gt;
* [[Semihosting Overview]] - Learn about host I/O services&lt;br /&gt;
* [[Memory Layout and Addressing]] - Understand memory organization&lt;br /&gt;
* [[Writing Programs for ZBC]] - Develop software for ZBC&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[Design Goals and Use Cases]] - Detailed exploration of ZBC&amp;#039;s purpose&lt;br /&gt;
* [[Key Concepts]] - Essential terminology and concepts&lt;br /&gt;
* [[ZBC Specification]] - Complete technical specification&lt;br /&gt;
&lt;br /&gt;
{{ZBC Navigation}}&lt;br /&gt;
&lt;br /&gt;
[[Category:Overview]]&lt;br /&gt;
[[Category:Foundation]]&lt;/div&gt;</summary>
		<author><name>Jbyrd</name></author>
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